The present invention relates to an image sensor chip, and to a manufacturing method and image sensor therefor.
FIG. 11 shows the general structure of a conventional image sensor 10 used in image-scanning devices or in the image read units of fax machines.
A plurality of image sensor chips 13 are secured within an area whose length corresponds to the read width on a substrate 12 disposed on the bottom surface of a case 11 made of a resin or the like. A transparent glass cover 14 is placed on the top surface of the case 11, and a rod lens array 15 for converging a contrast image, which is aligned with a read line L marked on the glass cover 14, as an erect image of the same size on the image sensor chip array is disposed between the read line L and the image sensor chips 13. A plurality of LEDs 16, which serve as light sources for illuminating a document D through the back surface of the glass cover 14, are mounted on the a substrate 17 inside the case 11.
For example, a 1728-bit photoreceptor must be provided to obtain such an image sensor in order to read an A4 document at 8 pixels per millimeter, and 18 image sensor chips 13 should be mounted on the substrate 12 in order to provide, for example, a single image sensor chip with a 96-bit photoreceptor. Here, the length of a single image sensor chip 13 is about 12 mm.
An image sensor chip 13 is fabricated by integrating a plurality of phototransistors that correspond to the photoreceptors, analog switches connected in series with each of the phototransistors, shift registers for sequentially selecting and switching on the analog switches in accordance with clock pulses, and the like. The output side of each of the analog switches is brought out to the output terminal of the chip.
An electric current corresponding to the amount of light received during a read cycle flows through each phototransistor. When such an image sensor chip is selected, the analog switches are sequentially switched on, for example, during the fall cycles of clock pulses, with the result that microcurrent analog data corresponding to the amount of light received by each phototransistor are serially outputted to the output terminal of the chip. The output terminal of the chip is connected to a load resistor on the substrate, and the potential difference at a terminal of this load resistor is amplified by an amplification circuit mounted on the substrate.
Thus, such conventional image sensors and image sensor chips mounted thereon operate on the principle that the output microcurrent from the image sensor chips flows through the load on the substrate, and the potential at the ends of this load is amplified by an amplification circuit.
A first drawback, therefore, is that the analog data signals outputted from such image sensor chips are microsignals in the form of a high-impedance output, which, basically, facilitates noise pickup and thus impairs the read performance of the image sensor. In particular, clock pulse signals of several hundred kilohertz for use in data shifting are inputted to the substrate 12 on which the image sensor chips 13 are mounted, and these clock pulse signals are thus ultimately superposed as alternating-current components on the analog data signals (as shown in FIG. 12), adversely affecting the output characteristics.
Methods commonly undertaken in order to minimize the effect of such noise involve surrounding the analog data wiring on the substrate with grounded wiring, and placing the clock signal wiring on the back side of the substrate in a position removed as far as possible from the sensor chips.
The result is that products provided with wiring patterns on both the front and back surfaces can solely be used for the substrate 12 (as is also shown in FIG. 11). This complicates the procedures involved in fabricating such products and in mounting components on them, involves forming irregularities for the components on the back surface of the substrate 12, detracts from the aesthetic appeal of the image sensor, requires more space in the width direction for installing such an image sensor, and makes it more difficult to design compact equipment containing such image sensors.
Another drawback is that the ICs, capacitors, and resistors constituting the amplification circuit; the varistors for adjusting the gain of the amplification circuit; and a plurality of other electronic components must be mounted on the substrate separately from the image sensor chips, complicating the steps involved in the manufacture of the image sensor substrate. Specifically, the various electronic component themselves are expensive, equipment is needed for mounting these electronic components on the substrate, and the varistors must be individually adjusted while the output of the amplification circuit is measured in order to adjust the gain of the amplification circuit in accordance with the specification requirements of the customer.
In view of the above, it is an object of the present invention to provide an image sensor chip for use in constructing a contact-type image sensor such that the substrate on which these components are mounted can be fabricated very easily, and to provide a smaller and thinner image sensor in which the substrate does not require noise prevention and in which a substrate wired on only one side can be used.
According to a first aspect of the present invention, there is provided an image sensor chip manufactured by integrating a prescribed number of photoelectric conversion elements as photoreceptors, analog switches connected in series to the corresponding photoelectric conversion elements, and a switch circuit for sequentially switching on the analog switches in accordance with clock signals; wherein this image sensor chip is characterized by further comprising
output load components jointly connected in series to sets composed of the photoelectric conversion elements and their respective analog switches; and an amplification circuit for amplifying the potential of the output load components on the side of the photoelectric conversion elements.
According to a preferred embodiment, the image sensor chip comprises a power terminal, a ground terminal, a clock signal input terminal, an analog signal output terminal, photoelectric conversion elements arranged in a row at regular intervals and connected at one end to the power terminal, analog switches connected to the respective output terminals of the photoelectric conversion elements, a switch circuit for sequentially switching on the analog switches in accordance with clock signals, and output load components jointly interposed between the ground terminal and the output terminals of the analog switches, wherein the chip is configured such that the output of the amplification circuit is outputted to the analog signal output terminal.
According to a preferred embodiment, the output load is a load resistor.
According to another preferred embodiment, the output load is a load capacitor.
According to yet another preferred embodiment, the output load consists of a load resistor and a load capacitor connected in parallel to each other.
In the preferred embodiment, the gain-adjusting resistor of the amplification circuit is also fabricated in integral form, and the gain-adjusting resistor comprises a plurality of resistors connected in series and cut table bypass wirings provided to all or some of the plurality of resistors.
Yet another feature of the preferred embodiment is that the amplification circuit is an operational amplifier; that the gain-adjusting resistor comprises a resistor group interposed between the inverting input and the output of the operational amplifier, and a resistor group interposed between the ground and the inverting input of the operational amplifier; and that each resistor group comprises a plurality of resistors connected in series and cut table bypass wirings provided to all or some of these resistors.
Thus, the image sensor chip pertaining to the subject invention is fabricated by integrating output load components for photoelectric conversion elements, and an amplification circuit for amplifying a terminal potential of these output load components into a single chip in addition to the basic structure of the image sensor chip comprising a prescribed number of photoelectric conversion elements serving as photoreceptors, analog switches connected in series to the corresponding photoelectric conversion elements, a switch circuit for sequentially switching on the analog switches in accordance with clock signals, and the like. In a preferred embodiment, a resistor for adjusting the gain of the amplification circuit is also integrated into the chip.
In such an image sensor chip, the microcurrent signals outputted as image read signals from the photoelectric conversion elements are outputted (without being allowed to escape from the sensor chips) outside as analog voltage signals obtained by amplifying with an amplification circuit the potential of the output load components on the side of the photoelectric conversion elements. It is therefore possible to markedly reduce or completely prevent the conventionally observed undesirable deterioration in the image read performance due to noise induced by clock signals. As a result, there is no need to provide the substrate for mounting such image sensor chips with amplification circuits or related components, or to form special wiring patterns for noise reduction, making it possible to position the image sensor chips on one side of the substrate and to provide a power source in order to complete the image sensors.
When this is done, a substrate obtained by mounting image sensor chips and light-emitting elements (light sources) on one side in such a manner is attached to the bottom surface of a case, a glass cover is placed on the top surface of the case, and an image sensor is configured such that reflected light from a document on the glass cover illuminated by the light-emitting elements is converged on the photoelectric conversion elements of the image sensor chips, in which case the back surface of the substrate facing the reverse side of this image sensor is free from the irregularities caused by the presence of electronic components, resulting in an improved outward appearance. The thickness dimensions of the image sensor itself can thereby be further reduced, and a narrower space is sufficient for accommodating the image sensor in an instrument designed for use with such image sensors. Collectively, these factors can contribute substantially to reducing the size of an equipment assembly containing such image sensors.
An advantage of using a resistance load as the output load of the amplification circuit is that the desired analog output waveform can be obtained by selecting an appropriate resistance for the load. Specifically, the analog output waveform should resemble a rectangular wave, that is, should have a horizontal or roughly horizontal top portion, to achieve accurate sensing of the output level, and the desirable output waveform can be obtained by appropriately selecting the resistance value of the resistance load.
When a load capacitor is used as the output load of the amplification circuit, correct dark level readings can be obtained because setting the capacitance of this capacitor to an appropriate level allows the electric charge accumulated in the photoelectric conversion elements in accordance with the amount of received light to flow as a burst of current through this load capacitor when the photoelectric conversion elements are selected for reading. Specifically, it is possible to reduce the amount of charge remaining in the photoelectric conversion elements during the outputting of output signals and to suppress the undesirable conditions in which, during the dark-level read cycle in which the photoelectric conversion elements do not receive any light, an output resembling that created by the reception of weak light is generated by the charge remaining in the photoelectric conversion elements from the preceding bright-level read cycle. This means that when a document containing fine horizontal ruled lines on a white background is read, such horizontal ruled lines can be read with sufficient accuracy.
The combined benefits of using a resistance load and a load capacitor can be obtained when these resistance load and load capacitor are connected in parallel with each other as the output load components of the amplification circuit.
In an image sensor chip pertaining to another preferred embodiment, the gain-adjusting resistor for the amplification circuit integrated into the chip comprises, in particular, a plurality of resistors connected in series and cut table bypass wirings provided to all or some of the plurality of resistors. When an operational amplifier is used as the amplification circuit, this resistor structure can be adopted for the resistors interposed between the ground and the inverting input of the amplifier and/or for the resistors interposed between the inverting input and the output terminal of the operational amplifier. For example, when four resistors of 20kxcexa9, 40k xcexa9, 80 kxcexa9, and 160 kxcexa9, respectively, are connected in series and respective bypass wirings are provided to these resistors to complete a resistor group, the resistance of the entire resistor group can be selected at a level ranging from 0 xcexa9 to 300 kxcexa9 in 20-kxcexa9 increments by selecting, out of the four resistors, the bypass wiring that is to be cut. The cutting of the bypass wirings can be accomplished very easily by laser cutting at the wafer stage, as described below.
In the image sensor chip pertaining to such an embodiment, even the gain of the built-in amplification circuit is preadjusted, making it possible to dispense with the inconvenient procedures performed in the past, such as mounting varistors on the substrate, monitoring the analog output of each substrate under prescribed conditions, and adjusting the varistors to adjust the gain of the amplification circuit. This contributes greatly to simplifying the manufacture of substrates for image sensors.
According to a second aspect of the present invention, a method for manufacturing an image sensor chip pertaining to the first aspect is provided. This manufacturing method is characterized in that the image sensor chip provided by the first aspect is used as a constituent unit, a wafer obtained by integrating a plurality of such units is fabricated, the gain of the amplification circuit is adjusted by cutting with a laser the bypass wirings of resistors selected from a plurality of resistors constituting the gain-adjusting resistor of each chip unit at the wafer stage, and the wafer is divided into image sensor chips by dicing.
Forming a mask on the wafer allows several hundred image sensor chips having the circuit characteristics described with reference to the first aspect to be fabricated as a single lot. These characteristics sometimes vary from wafer to wafer due to minute errors in maskwork conditions. The analog output produced by each chip area under prescribed illumination conditions is checked at the wafer stage. In the meantime, the voltage conditions for analog output are established in accordance with customer requirements and the like. The gain of the amplification circuit needed to obtain the output voltage conditions is set on the basis of the analog output thus checked. Once the gain is thus set, the adjusted value of the gain-adjusting resistor is determined, a decision is made as to which of the plurality of resistors making up the resistor group is to be left in order to achieve such an adjusted value, and the bypass wirings corresponding to these resistors are cut. The bypass wirings can be cut conveniently and rapidly by, for example, scanning an excimer laser beam across the wafer while switching the beam on and off in a controlled manner. An amplification circuit or an image sensor chip having a properly adjusted amplification circuit gain can thus be fabricated.
When an image sensor is configured by mounting a plurality of such image sensor chips, the gain of the amplification circuit is adjusted for each of the image sensor chips and the output level is smoothed, making it possible to adequately prevent the read performance from being adversely affected by the output variations in the main scanning direction due to differences in the output level among the chips.
Other features and advantages of the subject invention will become more apparent from the detailed description given below with reference to drawings.